1. Field of the Invention
The present invention is in the field of delay devices and more particularly, applies to circuitry for the generation of pure time delay or dead-time in the path of dynamic analog electrical signal information, for use in multi-variable and feed forward process control systems.
The majority of modern process control instruments communicate with one another via a standard d.c. current signal that ranges from 4 to 20 milliamperes which relates to the magnitude or parameter of a process variable being measured, or magnitude of a control signal. Since these current signals are dynamic or continuously variable, their levels may be referred to as amplitudes.
Transducers measure process variables or parameters such as flow rate, pressure, temperature, weight and chemical composition. Controllers receive this process information as a continuous dynamic analog signal and compute corrective control responses which are transmitted to actuators which are usually power actuated control valves.
Simple control systems such as flow, where the flow rate transducer and the flow control valve are located in proximity, operate in the same time frame since no lags or dead-times are involved and no time related problems exist. More complex control systems often exhibit severe time related problems.
The degree of process control that is achievable, or how close a process variable or parameter may be held to an optimum condition, is directly dependent upon a control system's capability to provide corrective actions that are as close to being 180.degree. out of phase with variations from optimum-set-point, as is possible. The achievement of this 180.degree., which permits an open loop control gain of unity, is normally not possible. This necessitates the reduction of loop gain, or control effectiveness, in proportion to the amount of inherent phase lag, in order to prevent instability and cycling. This is commonly referred to as sloppy control. Dead-time, which constitutes a pure time delay between a stimulus and its response, constitutes the major problem in these systems. Many of these problems may be resolved by this present invention.
Examples of applications include the necessity of measuring a variable at a point in transit which precedes its arrival at the control position, such as found in blending operations where solids travelling on a conveyor belt must normally be weighed on the belt before the material reaches the blending station. To properly control the blend ratios, the weight of the solids must be continuously stored in memory and recalled as the material reaches the blending point.
A more complex example of application is where chromatographs are used to analyze the chemical composition of a product produced by one or more process units which are charged upstream by blending two or more different crude streams. The chromatograph analyzer may sample at intervals of one minute because one minute is required to complete analysis. Process units exhibit residence time that is related to delays in transport and reaction of material. If the charge blending ratios are to be corrected on the basis of product analysis, it is necessary to be able to recall what the blend ratios were prior to residence and analysis dead-time, because other control inputs may be continuously varying these blend ratios on the basis of another process parameter.
A further problem in dealing with dead-time is that both mechanical and fluid process systems commonly operate at varying throughput rates, which in turn, vary the dead-time involved. The present invention also solves this problem since it may receive a secondary input signal for the control of its internal time delay function.
A different field of application from that of control, lies in the need to store and recall at some later time, discreet signal information relating to some value or magnitude of a continuing series of individual measurements. Such an application could be the weighing of individual containers on a conveyor belt and the need to hold this information in memory until such time as each container is delivered off the belt. The present invention resolves this problem through its ability to synchronize its delay period by means of item count, in addition to time delay.
2. The Prior Art
A process control application is described in U.S. Pat. No. 3,764,789 to Nara. The instrumentation used by Nara makes use of "analog shift registers", each having a plurality of analog storage elements connected in series. Nara does not describe the structure of his "analog shift register" because his patent relates to the entire automatic control system rather than its components.
In U.S. Pat. No. 3,675,049, Haven shows a device for delaying the bits of a serial digital data stream. Haven's innovation is the use of counters as delay stages, thereby causing the number of counter stages to increase as the base 2 logarithm of the maximum delay produced. Haven makes use of a distributor which supplies the bits of the data stream to the input of each counter-delay channel in turn. The distributor is arranged to advance to the next channel only after the occurence in the data stream of a 1. Data bits of 0 do not cause the distributor to advance. Due to the action of the bit distributor in selecting only 1's from the data stream for delay, fewer delay channels are needed than the total delay introduced. Thus, the invention of Haven is limited to use with a single stream of digital 1's and 0's.
In U.S. Pat. No. 3,799,871, Sequeira describes a sample and hold circuit in which an incoming analog signal is converted to digital form and stored in a single stage storage register. Upon receipt of a read-out signal, the digital data stored in the storage register is read out and converted to analog form. It is clear that in this invention, only one sample of information can be in storage at any one time, and thus, the maximum delay possible must be less than the sampling period of the data.
In U.S Pat. No. 3,532,907, Kasper shows a circuit for delaying a signal of predetermined characteristics based on the analog technique of issuing a signal when a current accumulated by a capacitor exceeds a predetermined value. Shift registers are not used.
The analog signal delaying devices presently known in the art, which make use of delay lines or capacitor arrays for signal storage, are expensive, bulky and maintenance prone. Electro-mechanical problems limit reliability, and decay and charging characteristics of the capacitor, place restraints on accuracy or reproduction of input amplitudes. Likewise, long time delays sometimes needed are impractical.
Because of these problems, the instrument control industry has adopted electronic dead-time simulation techniques for use wherever possible. While these provide the advantages of low cost, high reliability and small size, they produce only predictive approximations which limit the achievement of the theoretical process control performance available with true dead-time. The evidence appears to indicate an important and long felt need for a signal delaying device which will delay an analog signal by a precise adjustable time displacement and which will subsequently reproduce the signal with a high degree of fidelity and reliability, through the use of state-of-the-art electronic circuitry. Further, that its industrial implications in the improvement of process efficiencies and productivities are significant to the degree of a major instrumentation breakthrough.